Latches
D Latch with Reset
Description If the Reset is inactive and the the Output value is the opposite value of the input Data, a rising edge of the Clock will change the Output to match the input Data.

When the Reset is Enabled, the Output is forced LOW.

When the Data and Output are already the same values, a rising edge on the Clock will have no effect.
The Output is not persistent when powered-down.
Availability
  • Requires library: Process Control (option -05)
  • Firmware versions 0x1007 and later
savvy-SFD Graphic drLatch
Graphic with Parameters drLatch

Parameters

Data Input, Read-write, Boolean (signed 16-bit integer)
0 = Low
1 = High
Clock Input, Read-write, Boolean (signed 16-bit integer)
0 = Low
1 = High
Reset Input, Read-write, Boolean (signed 16-bit integer)
0 = Inactive
1 = Reset
Output Output, Read-only, Set to default on hard initialization, Boolean (signed 16-bit integer)
0 = Low
1 = High