1	comparator1	en	Comparator 1	This block has an adjustable hysteresis and a window mode option.With the window mode disabled, the block functions as a comparator with input 1 on the positive input and input 2 on the negative input.The hysteresis level is applied above and below the value of input 1. The hysteresis range is 0 - 10.00%.If the window mode is enabled, then the value on input 2 creates a symmetrical window around zero. If the value on input 1 lies within the window then the comparator output is high. If hysteresis is used in the window mode it is applied at each boundary.	5	type0F/FBS/comparator.dvg	type0F/FBE/comparator1.dvg	0	-60	100	180	410	753		0
2	comparator2	en	Comparator 2	This block has an adjustable hysteresis and a window mode option.With the window mode disabled, the block functions as a comparator with input 1 on the positive input and input 2 on the negative input.The hysteresis level is applied above and below the value of input 1. The hysteresis range is 0 - 10.00%.If the window mode is enabled, then the value on input 2 creates a symmetrical window around zero. If the value on input 1 lies within the window then the comparator output is high. If hysteresis is used in the window mode it is applied at each boundary.	5	type0F/FBS/comparator.dvg	type0F/FBE/comparator2.dvg	0	-60	100	180	420	754		0
3	comparator3	en	Comparator 3	This block has an adjustable hysteresis and a window mode option.With the window mode disabled, the block functions as a comparator with input 1 on the positive input and input 2 on the negative input.The hysteresis level is applied above and below the value of input 1. The hysteresis range is 0 - 10.00%.If the window mode is enabled, then the value on input 2 creates a symmetrical window around zero. If the value on input 1 lies within the window then the comparator output is high. If hysteresis is used in the window mode it is applied at each boundary.	5	type0F/FBS/comparator.dvg	type0F/FBE/comparator3.dvg	0	-60	100	180	430	755		0
4	comparator4	en	Comparator 4	This block has an adjustable hysteresis and a window mode option.With the window mode disabled, the block functions as a comparator with input 1 on the positive input and input 2 on the negative input.The hysteresis level is applied above and below the value of input 1. The hysteresis range is 0 - 10.00%.If the window mode is enabled, then the value on input 2 creates a symmetrical window around zero. If the value on input 1 lies within the window then the comparator output is high. If hysteresis is used in the window mode it is applied at each boundary.	5	type0F/FBS/comparator.dvg	type0F/FBE/comparator4.dvg	0	-60	100	180	440	756		0
5	changeoverSwitch1	en	Changeover Switch 1	This block has 2 inputs and 1 output.Note. A sample and hold function can be implemented by connecting the output to 606)C/O SW1 LO VALUE. The value on 605)C/O SW1 HI VALUE will be transfered to 606)C/O SW1 LO VALUE when 604)C/O SW1 CONTROL is HIGH. It will be held at the value pertaining when the control goes LOW.	4	type0F/FBS/changeoverSwitch1.dvg	type0F/FBE/changeoverSwitch1.dvg	0	0	120	120	450	757		0
6	changeoverSwitch2	en	Changeover Switch 2	This block has 2 inputs and 1 output.Note. A sample and hold function can be implemented by connecting the output to 609)C/O SW1 LO VALUE. The value on 608)C/O SW1 HI VALUE will be transfered to 609)C/O SW1 LO VALUE when 607)C/O SW1 CONTROL is HIGH. It will be held at the value pertaining when the control goes LOW.	4	type0F/FBS/changeoverSwitch2.dvg	type0F/FBE/changeoverSwitch2.dvg	0	0	120	120	460	758		0
7	changeoverSwitch3	en	Changeover Switch 3	This block has 2 inputs and 1 output.Note. A sample and hold function can be implemented by connecting the output to 612)C/O SW1 LO VALUE. The value on 611)C/O SW1 HI VALUE will be transfered to 612)C/O SW1 LO VALUE when 610)C/O SW1 CONTROL is HIGH. It will be held at the value pertaining when the control goes LOW.	4	type0F/FBS/changeoverSwitch3.dvg	type0F/FBE/changeoverSwitch3.dvg	0	0	120	120	470	759		0
8	changeoverSwitch4	en	Changeover Switch 4	This block has 2 inputs and 1 output.Note. A sample and hold function can be implemented by connecting the output to 615)C/O SW1 LO VALUE. The value on 614)C/O SW1 HI VALUE will be transfered to 615)C/O SW1 LO VALUE when 613)C/O SW1 CONTROL is HIGH. It will be held at the value pertaining when the control goes LOW.	4	type0F/FBS/changeoverSwitch4.dvg	type0F/FBE/changeoverSwitch4.dvg	0	0	120	120	480	760		0
11	summer1	en	Summer 1	This block allows programming of a general purpose signal summing and scaling block.There are 3 inputs with varying degrees of functionality.CH1 has deadband, offset, scale, divide, clamp and subtotal monitor functions.CH2 has offset, scale, divide, clamp and subtotal monitor functions..CH3 is a direct input.The summed total has on offset an clamping function.	16	type0F/FBS/summer.dvg	type0F/FBE/summer1.dvg	0	-80	900	280	190	999		0
12	summer2	en	Summer 2	This block allows programming of a general purpose signal summing and scaling block.There are 3 inputs with varying degrees of functionality.CH1 has deadband, offset, scale, divide, clamp and subtotal monitor functions.CH2 has offset, scale, divide, clamp and subtotal monitor functions..CH3 is a direct input.The summed total has on offset an clamping function.	16	type0F/FBS/summer.dvg	type0F/FBE/summer2.dvg	0	-80	900	280	200	1000		0
13	mf1	en	Multifunction 1	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf1.dvg	type0F/FBE/mf1.dvg	0	0	230	180	280	969		0
14	mf2	en	Multifunction 2	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf2.dvg	type0F/FBE/mf2.dvg	0	0	230	180	290	970		0
15	mf3	en	Multifunction 3	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf3.dvg	type0F/FBE/mf3.dvg	0	0	230	180	300	971		0
16	mf4	en	Multifunction 4	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf4.dvg	type0F/FBE/mf4.dvg	0	0	230	180	310	972		0
17	mf5	en	Multifunction 5	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf5.dvg	type0F/FBE/mf5.dvg	0	0	230	180	320	973		0
18	mf6	en	Multifunction 6	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf6.dvg	type0F/FBE/mf6.dvg	0	0	230	180	330	974		0
19	mf7	en	Multifunction 7	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf7.dvg	type0F/FBE/mf7.dvg	0	0	230	180	340	975		0
20	mf8	en	Multifunction 8	Available functions are comparator, AND, OR, LOGIC INVERT, sign change, rectify and sample and hold. This block may also be used as a JUMPER to make connections.	5	type0F/FBS/mf8.dvg	type0F/FBE/mf8.dvg	0	0	230	180	350	976		0
21	filter1	en	Filter 1	The filter has an accurate time constant set by the user. With a 0.000 value the filter is transparent.	4	type0F/FBS/filter.dvg	type0F/FBE/filter1.dvg	0	-20	120	80	370	1010		0
22	filter2	en	Filter 2	The filter has an accurate time constant set by the user. With a 0.000 value the filter is transparent.	4	type0F/FBS/filter.dvg	type0F/FBE/filter2.dvg	0	-20	120	80	380	1011		0
23	filterLP	en	Lowpass Filter	The filter has a fixed 10Hz bandwidth.	2	type0F/FBS/filterLP.dvg	type0F/FBE/filterLP.dvg	0	-20	120	80	381	0		0
24	latch	en	Latch	This block provides a standard D type latch function with clock, data, set and rest inputs. The logic inputs are scanned at least once every 50mS hence the maximum operating frequency is 10Hz.	8	type0F/FBS/latch.dvg	type0F/FBE/latch.dvg	0	-20	350	220	360	1009		0
25	uip2a	en	UIP2 (T2) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip2a.dvg	type0F/FBE/uip2a.dvg	40	-60	440	120	490	0		0
26	uip2d	en	UIP2 (T2) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip2d.dvg	type0F/FBE/uip2d.dvg	-30	-80	400	180	495	0		0
27	uip3a	en	UIP3 (T3) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.UIP3 is specially adapted to acquire signals with a faster response than the others and is therefore used for input to the speed/current loop that requires a fast response.There is a permanent internal connection to the speed/current loop from UIP3 to 64)SPEED REF 3 MON. The linear GOTO of UIP3 is operative independantly of the internal connection to the speed/current loop. (Note. The GOTO may be left configured to 400)Block Disconnect, if the internal connection is utilised). To connect UIP3 elsewhere, nullify the internal connection, (set 67)SPD/CUR RF3 RATIO in the SPEED REF SUMMER block to 0.0000), then reconfigure the linear GOTO. The parameter 64)SPEED REF 3 MON is a monitor of the UIP3 analog output.	8	type0F/FBS/uip3a.dvg	type0F/FBE/uip3a.dvg	40	-60	460	120	500	0		0
28	uip3d	en	UIP3 (T3) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip3d.dvg	type0F/FBE/uip3d.dvg	-30	-80	400	180	505	0		0
29	uip4a	en	UIP4 (T4) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip4a.dvg	type0F/FBE/uip4a.dvg	40	-60	440	120	510	0		0
30	uip4d	en	UIP4 (T4) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip4d.dvg	type0F/FBE/uip4d.dvg	-30	-80	400	180	515	0		0
31	uip5a	en	UIP5 (T5) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip5a.dvg	type0F/FBE/uip5a.dvg	40	-60	440	120	520	0		0
32	uip5d	en	UIP5 (T5) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip5d.dvg	type0F/FBE/uip5d.dvg	-30	-80	400	180	525	0		0
33	uip6a	en	UIP6 (T6) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip6a.dvg	type0F/FBE/uip6a.dvg	40	-60	440	120	530	0		0
34	uip6d	en	UIP6 (T6) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip6d.dvg	type0F/FBE/uip6d.dvg	-30	-80	400	180	535	0		0
35	uip7a	en	UIP7 (T7) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip7a.dvg	type0F/FBE/uip7a.dvg	40	-60	440	120	540	0		0
36	uip7d	en	UIP7 (T7) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip7d.dvg	type0F/FBE/uip7d.dvg	-30	-80	400	180	545	0		0
37	uip8a	en	UIP8 (T8) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip8a.dvg	type0F/FBE/uip8a.dvg	40	-60	440	120	550	0		0
38	uip8d	en	UIP8 (T8) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip8d.dvg	type0F/FBE/uip8d.dvg	-30	-80	400	180	555	0		0
39	uip9a	en	UIP9 (T9) Analog	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.	7	type0F/FBS/uip9a.dvg	type0F/FBE/uip9a.dvg	40	-60	440	120	560	0		0
40	uip9d	en	UIP9 (T9) Digital	The PL/X series not only possesses 8 analogue inputs, but also measures all of these to high resolution with excellent response time. In addition it is possible to program the voltage range of each input to +/- (5/10/20/30V). This allows signals other than 10V full scale to be used, and enables the input to be used as a sophisticated digital input. This can be achieved for example, by programming the input to the 30V range and selecting the programmable logic threshold at 15V, to recognise a 0 or 1.Each input has 3 outputs, a linear output and a dual logic output. They operate simultaneously.Logic functions.Adjustable threshold for logic level detection.The comparator output is a low or a high. The high state results in the HI VALUE being output. The low state results in the LO VALUE output.Note. UIPs offer good noise immunity.There are 2 sets of value for high and value for low windows each pair having its own GOTO connection facility. This allows 2 independent output values for a logic high input and 2 independent output values for a logic low input. This facility allows versatile parameter changeover functions to be selected by a single input.For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	7	type0F/FBS/uip9d.dvg	type0F/FBE/uip9d.dvg	-30	-80	400	180	565	0		0
41	aop1	en	AOP 1 (T10)	12 bit plus sign resolution (2.5mV steps).Short circuit protection to 0V. (Protection is only available for any one output. More than 1 OP shorted may damage the unit).Output current +/-5mA maximum.Output range 0 to +/-11.300V. (10V normally represents 100%).	5	type0F/FBS/aop1.dvg	type0F/FBE/aop1.dvg	20	-60	440	120	571	0		0
42	aop2	en	AOP 2 (T11)	12 bit plus sign resolution (2.5mV steps).Short circuit protection to 0V. (Protection is only available for any one output. More than 1 OP shorted may damage the unit).Output current +/-5mA maximum.Output range 0 to +/-11.300V. (10V normally represents 100%).	5	type0F/FBS/aop2.dvg	type0F/FBE/aop2.dvg	20	-60	440	120	572	0		0
43	aop3	en	AOP 3 (T12)	12 bit plus sign resolution (2.5mV steps).Short circuit protection to 0V. (Protection is only available for any one output. More than 1 OP shorted may damage the unit).Output current +/-5mA maximum.Output range 0 to +/-11.300V. (10V normally represents 100%).	6	type0F/FBS/aop3.dvg	type0F/FBE/aop3.dvg	20	-60	520	120	573	0		0
44	aop4	en	AOP 4 (T29)		1	type0F/FBS/aop4.dvg	type0F/FBE/aop4.dvg	-30	-20	310	80	574	0		0
45	dip1	en	DIP 1 (T14)	The DIP inputs may also be used for incremental encoder or register mark inputs. In this case the logic functions will continue to operate as described here.The LO and HI values can be entered using the display and keys, or may be connected to other output PINs using JUMPERS. This turns the function into a change-over switch for dynamic values. For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.Using DIP inputs for encoder signals.Logic thresholds. 0 < 2V,  1 > 4VNote. When using encoders with quadrature outputs it is very important that the phase relationship of the 2 pulse trains remains as close to 90 degrees as possible. If the encoder is not mounted and centered accurately on the shaft, it can cause skewing of the internal optics as the shaft rotates through 360 degrees. This produces a severe degradation of the phase relationship on a cyclical basis. If the encoder appears to gyrate as the shaft rotates you must rectify the problem before trying to proceed with commissioning. The best way of checking the output is to use a high quality oscilloscope and observe both pulse trains for good phase holding and no interference. Do this with the drive rotating to +/- 100% speed using AVF as the feedback source. Note. If a logic input with high noise immunity is required it is recommended to use a UIP.	3	type0F/FBS/dip1.dvg	type0F/FBE/dip1.dvg	-30	-90	190	120	581	0		0
46	dip2	en	DIP 2 (T15)	The DIP inputs may also be used for incremental encoder or register mark inputs. In this case the logic functions will continue to operate as described here.The LO and HI values can be entered using the display and keys, or may be connected to other output PINs using JUMPERS. This turns the function into a change-over switch for dynamic values. For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.Using DIP inputs for encoder signals.Logic thresholds. 0 < 2V,  1 > 4VNote. When using encoders with quadrature outputs it is very important that the phase relationship of the 2 pulse trains remains as close to 90 degrees as possible. If the encoder is not mounted and centered accurately on the shaft, it can cause skewing of the internal optics as the shaft rotates through 360 degrees. This produces a severe degradation of the phase relationship on a cyclical basis. If the encoder appears to gyrate as the shaft rotates you must rectify the problem before trying to proceed with commissioning. The best way of checking the output is to use a high quality oscilloscope and observe both pulse trains for good phase holding and no interference. Do this with the drive rotating to +/- 100% speed using AVF as the feedback source. Note. If a logic input with high noise immunity is required it is recommended to use a UIP.	3	type0F/FBS/dip2.dvg	type0F/FBE/dip2.dvg	-30	-90	190	120	582	0		0
47	dip3	en	DIP 3 (T16)	The DIP inputs may also be used for incremental encoder or register mark inputs. In this case the logic functions will continue to operate as described here.The LO and HI values can be entered using the display and keys, or may be connected to other output PINs using JUMPERS. This turns the function into a change-over switch for dynamic values. For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.Using DIP inputs for encoder signals.Logic thresholds. 0 < 2V,  1 > 4VNote. When using encoders with quadrature outputs it is very important that the phase relationship of the 2 pulse trains remains as close to 90 degrees as possible. If the encoder is not mounted and centered accurately on the shaft, it can cause skewing of the internal optics as the shaft rotates through 360 degrees. This produces a severe degradation of the phase relationship on a cyclical basis. If the encoder appears to gyrate as the shaft rotates you must rectify the problem before trying to proceed with commissioning. The best way of checking the output is to use a high quality oscilloscope and observe both pulse trains for good phase holding and no interference. Do this with the drive rotating to +/- 100% speed using AVF as the feedback source. Note. If a logic input with high noise immunity is required it is recommended to use a UIP.	3	type0F/FBS/dip3.dvg	type0F/FBE/dip3.dvg	-30	-90	190	120	583	0		0
48	dip4	en	DIP 4 (T17)	The DIP inputs may also be used for incremental encoder or register mark inputs. In this case the logic functions will continue to operate as described here.The LO and HI values can be entered using the display and keys, or may be connected to other output PINs using JUMPERS. This turns the function into a change-over switch for dynamic values. For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.Using DIP inputs for encoder signals.Logic thresholds. 0 < 2V,  1 > 4VNote. When using encoders with quadrature outputs it is very important that the phase relationship of the 2 pulse trains remains as close to 90 degrees as possible. If the encoder is not mounted and centered accurately on the shaft, it can cause skewing of the internal optics as the shaft rotates through 360 degrees. This produces a severe degradation of the phase relationship on a cyclical basis. If the encoder appears to gyrate as the shaft rotates you must rectify the problem before trying to proceed with commissioning. The best way of checking the output is to use a high quality oscilloscope and observe both pulse trains for good phase holding and no interference. Do this with the drive rotating to +/- 100% speed using AVF as the feedback source. Note. If a logic input with high noise immunity is required it is recommended to use a UIP.	3	type0F/FBS/dip4.dvg	type0F/FBE/dip4.dvg	-30	-90	190	120	584	0		0
49	dipRun	en	Run DIP (T31)	In the unlikely event that there is a shortage of digital inputs, the RUN input may be used.The default target PIN normally used by the RUN input is called 308)INTERNAL RUN IP. It must be set to a logic high when the RUN input terminal is disconnected.The LO and HI values can be entered using the display and keys, or may be connected to other output PINs using JUMPERS. This turns the function into a change-over switch for dynamic values. For logic only usage a value of 0.00% is read as a low. Any non zero +/- value is read as a high. Logic inversion is accomplished by entering 0.00% in the value for HI window and 0.01% in the value for LO window.	3	type0F/FBS/dipRun.dvg	type0F/FBE/dipRun.dvg	-30	-90	190	120	585	0		0
50	dio1	en	DIO 1 (T18)	The digital output function is connected to the terminal via a diode which is shown in the block.When the output is low then the diode is reverse biased and the terminal may be taken high if desired. Note. The PL/X must be stopped in order to implement a DIOX OP MODE change.	9	type0F/FBS/dio1.dvg	type0F/FBE/dio1.dvg	0	-60	520	140	591	0		0
51	dio2	en	DIO 2 (T19)	The digital output function is connected to the terminal via a diode which is shown in the block.When the output is low then the diode is reverse biased and the terminal may be taken high if desired. Note. The PL/X must be stopped in order to implement a DIOX OP MODE change.	9	type0F/FBS/dio2.dvg	type0F/FBE/dio2.dvg	0	-60	520	140	592	0		0
52	dio3	en	DIO 3 (T20)	The digital output function is connected to the terminal via a diode which is shown in the block.When the output is low then the diode is reverse biased and the terminal may be taken high if desired. Note. The PL/X must be stopped in order to implement a DIOX OP MODE change.	9	type0F/FBS/dio3.dvg	type0F/FBE/dio3.dvg	0	-60	520	140	593	0		0
53	dio4	en	DIO 4 (T21)	The digital output function is connected to the terminal via a diode which is shown in the block.When the output is low then the diode is reverse biased and the terminal may be taken high if desired. Note. The PL/X must be stopped in order to implement a DIOX OP MODE change.	9	type0F/FBS/dio4.dvg	type0F/FBE/dio4.dvg	0	-60	520	140	594	0		0
54	dop1	en	DOP 1 (T22)	The digital output block source may be a linear or logic value. After processing by the rectifier box it gets compared to the threshold. The comparator output state HIGH or LOW is then inverted or not inverted by the inverter mode box and becomes a 24V logic signal.For comparing logic values always put 0.00% in the threshold window. The comparator output is low for identical inputs.	5	type0F/FBS/dop1.dvg	type0F/FBE/dop1.dvg	0	-60	340	120	601	0		0
55	dop2	en	DOP 2 (T23)	The digital output block source may be a linear or logic value. After processing by the rectifier box it gets compared to the threshold. The comparator output state HIGH or LOW is then inverted or not inverted by the inverter mode box and becomes a 24V logic signal.For comparing logic values always put 0.00% in the threshold window. The comparator output is low for identical inputs.	5	type0F/FBS/dop2.dvg	type0F/FBE/dop2.dvg	0	-60	340	120	602	0		0
56	dop3	en	DOP 3 (T24)	The digital output block source may be a linear or logic value. After processing by the rectifier box it gets compared to the threshold. The comparator output state HIGH or LOW is then inverted or not inverted by the inverter mode box and becomes a 24V logic signal.For comparing logic values always put 0.00% in the threshold window. The comparator output is low for identical inputs.	6	type0F/FBS/dop3.dvg	type0F/FBE/dop3.dvg	0	-60	420	120	603	0		0
59	parameterProfiler	en	Parameter Profiler	This block is used when it is desirable to modulate one parameter according to the magnitude of another. A typical example is changing the gain of a block as the error increases.The block symbol shows the profiler working in the positive quadrant by using a rectified version of the input signal to indicate the position on the profile X axis. The related Y axis amplitude is then sent to the block output. Both axes are able to impose maximum and minimum levels to the profile translation. The profile curve is able to adopt several different modes.It is possible to use the block in up to 4 quadrants for specialist applications.The input is connected by using the PRFL X-AXIS GET FROM.	9	type0F/FBS/parameterProfiler.dvg	type0F/FBE/parameterProfiler.dvg	0	-20	280	300	230	1003		0
60	presetSpeed	en	Preset Speed	This block provides a versatile preset value selection machine. The primary use is for preset speeds. By defining output values for each one of 8 possible input combinations, various types of preset mode are possible. E. g. Input priority, input summing, BCD thumbwheel code.This block contains 8 consecutive PINs with a range of +/-300.00%. If the block is not being used for its intended function then these PINs are ideal as extra STAGING POSTS.	13	type0F/FBS/presetSpeed.dvg	type0F/FBE/presetSpeed.dvg	0	0	280	450	270	1008		0
65	serial	en	Serial port	The RS232 PORT1 is located just above the middle set of control terminals.It is a female 4 way FCC-68 type socket.This port can be used in 2 ways.1) For PARAMETER EXCHANGE with other devices.a) From another computer or drive in ASCII.b) To another computer or drive in ASCII.c) To another computer or printer in the form of a text list of display windows and their parameters.This function may be used to keep records and files of parameter settings, or allow the transfer of parameter settings from an old control board to a new one.There is also an option to select ASCII COMMS in 188)PORT1 FUNCTION to implement a full duplex ANSI communications protocol for use with a host computer or for interface with the PC based configuration tool.Note. PORT 1 FUNCTION is not subject to password control.2) For speed REFERENCE EXCHANGE to or from another unit in digital format during running.This allows low cost digital speed accuracy ratio between drives especially when using encoder feedback.	13	type0F/FBS/serial.dvg	type0F/FBE/serial.dvg	0	-20	280	80	180	0		0
66	runModeRamp	en	Run Mode Ramp	This block sets the rate of acceleration and deceleration of the motor independantly of the incoming reference. There are 4 independent up/down forward/reverse ramp times, and an output indicates that ramping is taking place. The output can be held, or preset to any value with preset commands from various sources for a wide number of applications. The ramp shape can be profiled to a classic S shape for smooth control. Note that the RUN MODE RAMP may be programmed to be active when the unit is in stop mode. This function is useful in cascaded systems.The block also provides adjustment for parameters associated with jogging, slack take up and crawling.Jog and slack have their own ramp rate time which overides the run mode ramp. The incoming reference can have a minimum speed imposed in either direction. The ramp preset function is momentary in jog modeA different down ramp time is settable for stopping initiated by T33 START going low.Their are 2 output flags as follows689)IN JOG FLAG.This is high during the jogging process, it goes low after the ramp has returned to the prevailing run level.714)IN SLACK FLAG.This is high during the slack take up process, it goes low after the ramp has returned to the prevailing run level.	19	type0F/FBS/runModeRamp.dvg	type0F/FBE/runModeRamp.dvg	0	-170	550	550	1	0	fb_PL_RunModeRamp	0
67	speedControl	en	Speed Control	The block diagram below shows the signal paths for the speed loop error amplifier. There are 4 speed reference inputs.Connections. (62, 63, 65 may be re-programmed)Motorised potentiometer to    62)INT SPEED REF 1.UIP2/T2   To                        63)SPEED REF 2UIP4/T4 - Run mode ramp to  65)RAMPED SPD REF 4UIP3/T3 Internally connected to 64)SPEED REF3 MON64)SPEED REF 3 MON is a monitor of UIP3 only when it is being used as a speed ref with speed bypass disabled. It may be inverted and/or scaled if desired.It is sampled rapidly to give maximum response.Note. The STOP command overides and disables the speed bypass mode. This ensures a controlled stop to zero speed when using the speed bypass mode.The inputs are summed and then subjected to programmable maximum +ve and -ve clamps. The output after the clamps is the final speed reference which is available to be monitored. This is selected during normal running. During a stop sequence this is reset to zero at the programmed STOP rate. The stop ramp is released immediately when running is resumed. The output after this selection is the speed demand and is summed with negative speed feedback to produce a speed error. This is then processed in the speed loop P + I error amplifier. The output of this block is the current reference that is sent to the current control blocks during normal running.	27	type0F/FBS/speedControl.dvg	type0F/FBE/speedControl.dvg	0	-100	860	300	50	0		0
68	currentLimits	en	Current Limits	The current control loop gets its current reference from the output of the speed loop error amplifier. The reference enters the current control section and is subjected to a series of 4 clamps.i)  3)CURRENT LIMIT(%). This provides the absolute limits of overload.(See CALIBRATION block).ii) CURRENT OVERLOAD. This allows the drive to actively modify the current overload as it occurs. The reduction rate of the overload is adjustable. After an overload, the load must return below the target level for an equivalent time, to re-enable the overload capability.iii) I DYNAMIC PROFILE. This clamp is used to protect motor commutators that have problems commutating current at high speed or in field weakening mode of operation. This function allows the setting of break points that profile the current according to the speed.iv) 89)UPPER CUR CLAMP and 90)LOWER CUR CLAMP. These clamps allow the current limits to be adjusted from external signals. They can accept a single positive input and produce a scaled bi-polar clamp, or separate positive and negative inputs for the upper clamp and lower clamp. Scaling is achieved by a master current scaler.The 4 clamps operate such that the lowest has priority. The actual prevailing clamp level is available as a diagnostic for +ve and -ve current.	20	type0F/FBS/currentLimits.dvg	type0F/FBE/currentLimits.dvg	0	-120	860	280	71	0		0
69	currentControl	en	Current Monitor	The output of the clamping stage is referred to as the current demand, and is compared with the current feedback in a P + I error amplifier. The control terms and a non-linear adaptive algorithm are available for programming. There is also the facility to activate a super fast current response.The output becomes the phase angle demand for the thyristor stack.	14	type0F/FBS/currentControl.dvg	type0F/FBE/currentControl.dvg	0	-120	780	220	70	0		0
70	stopModeRamp	en	Stop Mode Ramp	This block allows setting of the contactor drop out behaviour.Adjustable parameters.The DROP OUT speed threshold and DROP OUT delay.The STOP RAMP time and STOP TIME LIMIT.LIVE DELAY MODE enables the drive during the DROP OUT DELAY time.If START or JOG goes high during the DROP-OUT DELAY time, then the contactor stays energised and the drive will restart immediately. The DROP-OUT DELAY timer will be reset to time zero. This allows jogging without the contactor dropping in and out.	8	type0F/FBS/stopModeRamp.dvg	type0F/FBE/stopModeRamp.dvg	40	-80	360	160	30	0	fb_PL_RunModeRamp	0
71	zeroInterlocks	en	Zero Interlocks	This block is used to enable 2 interlocking functions that are associated with zero speed.The normal standstill behaviour is as follows.After the satisfying conditions of 'zero speed and current demand', AND 'zero speed feedback' are fulfilled, the firing pulses are removed and all other loops remain active to enable a rapid response for a new request for speed. 117)ZERO INTLK SPD % sets the threshold for both the zero speed reference and feedback decisions.118)ZERO INTLK CUR % sets the threshold for the zero current demand decision.If 118)ZERO INTLK CUR % is set to 0.00% then the firing pulses are not removed.Due to the rapid response of the above mode, it may be necessary to implement 115)STANDSTILL ENBL. Without this quench function enabled the motor may be continuously moving as the system responds to small variations, which may be undesirable.i) 115)STANDSTILL ENBL provides an extra level of inhibit by not only removing the firing pulses but also quenching the loops.It operates after the satisfying conditions of zero speed reference, and zero speed feedback are fulfilled. 117)ZERO INTLK SPD % sets the threshold for both the zero speed ref and feedback decisions.ii) 116)ZERO REF START. This prevents the current control being enabled after a start command, if the total speed reference to the drive, or the input to the RUN MODE RAMP, is not at zero. It is used if starting the motor inadvertently may be undesirable. The message CONTACTOR LOCK OUT will appear after approximately 2 seconds if this function is not satisfied. The contactor is de-energised.E. g. If an extruder is full of cold plastic, then starting it may damage the screw. By implementing this function the operator has to deliberately set the references to zero before he can commence running.For these functions to work the zero threshold levels 117)ZERO INTLK SPD % and 118)ZERO INTLK CUR % need to be defined. All the threshold levels are symmetrical for reverse rotation and have hysterisis of +/-0.5% around the chosen level.	14	type0F/FBS/zeroInterlocks.dvg	type0F/FBE/zeroInterlocks.dvg	40	-40	600	440	90	0		0
72	contactorControl	en	Contactor Control	The following conditions must be true for the main contactor to be energised.1) All alarms AND supply synchronisation healthy. ( 699)READY FLAG ).2) CSTOP at 24V. Note. The CSTOP must be high for at least 50mS prior to START going high.3) Start OR Jog high.When the contactor has energised, the drive will run ifRUN input is high AND, if enabled, the ZERO INTERLOCK is satisfied.The contactor will de-energise after approximately 100 milliseconds if 699)READY FLAG goes low OR CSTOP goes low If the zero interlock is enabled and requests a non-run action, then the contactor will energise for approximately 2 seconds but no current will flow. The contactor will drop out if the zero reference interlock condition is not satisfied within approximately 2 seconds. The display will show CONTACTOR LOCK OUT.The contactor will de-energise if START and JOG are both low. In this case the time taken for the contactor to de-energise depends on the STOP MODE RAMP when stopping from a running mode, or JOG/SLACK RAMP when stopping from a jog mode.Note flags689)IN JOG FLAG, 698)HEALTHY FLAG, 699)READY FLAG,714)IN SLACK FLAG, 720)SYSTEM RESET pulse.	14	type0F/FBS/contactorControl.dvg	type0F/FBE/contactorControl.dvg	0	100	770	750	620	0		0
75	driveAlarms	en	Drive Alarms	WARNING. All these alarms are generated with semiconductor electronics. Local safety codes may mandate electro-mechanical alarm systems. All alarms must be tested in the final application prior to use. The manufacturers and suppliers of the PL/X are not responsible for system safety.There are 16 alarms that continuously monitor important parameters of the motor drive system. 10 of the alarms are permanently enabled and 6 of the alarms can be enabled or disabled using this block. It also monitors the alarm status.If any enabled alarm is triggered it is then latched causing the drive to shut down and the main contactor to be de-energised.If the alarm has been disabled then it will not be latched and will not affect the operation of the drive, although it can still be monitored.If 171)SPEED TRIP ENABLE is disabled, then an automatic switch to AVF is implemented for tacho and/or encoder feedback.There are 3 monitoring functions for all 16 alarms.1) An active monitor prior to the latch2) A monitor of the latched status of the alarm.3) A displayed message showing which alarm caused the drive to shut down. The displayed message will automatically appear whenever the drive is running, and can be removed from the display by tapping the left key or starting the drive. It may be re-examined using the DRIVE TRIP MESSAGE block. The message will be memorised if the control supply is removed. The arrival of the alarms prior to the trigger can be accessed for advance warning purposes using the active monitor window. There is a USER ALARM on PIN 712. This may be connected by the user to any flag, to trip the drive.	21	type0F/FBS/driveAlarms.dvg	type0F/FBE/driveAlarms.dvg	-20	-100	940	1180	165	0		0
76	calibration	en	Calibration	This block allows the PL/X to be matched to the motor. The motor armature, field and supply ratings are entered here. Also feedback transducer type and scaling. Provision is also made for alternate operation of 2 different motors from the same PL/X.Note:- These parameters are not reset to default values by a 4-KEY RESET.	34	type0F/FBS/calibration.dvg	type0F/FBE/calibration.dvg	-20	-1010	860	1240	100	0		0
77	passiveMotor	en	Passive Motor	The reduced display parameter set is a collection of approximately 50 parameters which typically match a particular motor and its operational performance with the PL/X. There are 2 sets of these. They are called the Active and the Passive set.By using 20)MOTOR 1, 2 SELECT in the CALIBRATION block, the active and passive sets are swapped within the working recipe, allowing a different motor to be run from the same drive. E. G. Hoist motor 1, traverse motor 2.This block contains the passive motor set. (Either Motor1 or Motor2 depending on state of 20)MOTOR 1, 2 SELECT)	39	type0F/FBS/passiveMotor.dvg	type0F/FBE/passiveMotor.dvg	-15	-10	160	65	670	0		0
78	displayFunctions	en	Display Functions	This menu is used to alter the display presentation.The REDUCED MENU shows only the commonly used selections and enables more rapid travel around the tree structure.(There are 2 sets of reduced menu parameter values that can be selected, using 20)MOTOR 1, 2 SELECT. This enables 2 different motors to be controlled in turn by 1 drive unit.)PasswordThe password will prevent accidental alteration by unauthorised users. It does not protect against sabotage.It allows a password to be required prior to parameter changes. The default password and power up entry are both 0000. So a PL/X that has not had a password alteration is always unlocked.An altered password is not retained after removal of the control supply unless a PARAMETER SAVE has been actioned. If a parameter change is tried without a valid password entry then the message ENTER PASSWORD will flash as the up/down keys are pressed. A file copied using parameter exchange will carry the password from the source page. If that file is transmitted to another drive unit, the password will be carried with it. This requires careful housekeeping.To alter the password, enter the existing password in the ENTER PASSWORD window first. Then using this window, change to the new desired password. The altered password is immediately effective and copied to the ENTER PASSWORD window, but only retained for the next power up if a PARAMETER SAVE is performed, otherwise the previous password will be required again	7	type0F/FBS/displayFunctions.dvg	type0F/FBE/displayFunctions.dvg	0	0	200	45	185	0		0
79	Fieldbus	en	Fieldbus	This section outlines the FIELDBUS CONFIG block. It is used to select parameters for transmitting to, or receiving from, the host controller using for example PROFIBUS protocol. Other protocols may be used depending on which comms option card is fitted to the PL/X.Each parameter selected for transmission from the PL/X is configured using a GET FROM. Each parameter selected for receiving by the PL/X  is configured using a GOTO.There is also "DATA ON DEMAND" providing a roaming read/write facility to any PIN	34	type0F/FBS/fieldbus.dvg	type0F/FBE/fieldbus.dvg	-30	-20	210	1000	660	0		0
80	monitors	en	Monitors	Monitors and Internal ConnectionsSpeed Loop MonitorThis block allows monitoring of the parameters associated with the speed loop.The feedback sources can also be read in engineering units which alleviates the need to undertake difficult readings with a voltmeter during commissioning.For convenience, the armature voltage is also shown as a % of max rated value.The armature volts, tacho volts and encoder rpm monitors all function continuously, irrespective of which is the source of feedback. These signal channels may be utilised for tasks other than speed feedback.Armature Current MonitorThis block allows monitoring of the parameters associated with the inputs to the current loop. The feedback current can be read in amps which alleviates the need to undertake difficult readings with an ammeter during commissioning.For convenience the armature current is also shown as a % of max rated value.Field MonitorThis block allows monitoring of the parameters associated with the field control loop.The motor field current can be read in amps which alleviates the need to undertake difficult readings with an ammeter during commissioning.Analog I/O MonitorThis block allows monitoring of the analogue input and output functions.Analogue inputs are UIP2 to UIP9. The UIP number corresponds to its terminal number.UIP2 to 9 are universal inputs and can be used as digital and/or analogue inputs. The analogue value appears in this block and the digital logic level will simultaneously appear in the digital IO block.Note that the analogue output monitor for AOP1/2/3 shows the value written to that output. If the output is overloaded or shorted then the value shown will not agree with the actual output.The PL/X possesses a very useful commissioning tool, 260)SCOPE OP SELECT. When enabled, this automatically configures AOP3 on terminal 12 to serve as a linear output for an oscilloscope probe. The output is automatically connected to whatever parameter is being displayed, and reconnected to its original source after the function is no longer enabled.Digital I/O MonitorThis block allows monitoring of the digital input and output functions.UIP2 to UIP9, DIP1 to DIP4, DIO1 to DIO4, DOP1 to DOP3.UIP2 to 9 are universal inputs and can be used as digital and/or analogue inputs. The digital logic level always appears in this block and the analogue value will simultaneously appear in the analogue IO monitor block.The 3 drive control functions, Run, Jog, Start are ANDED with their respective hardware equivalent input terminal and the resulting output controls the drive. This allows the local terminal function to be over-ridden by a remote command, OR a remote command to be over-ridden by a local terminal.The drive personality block is used to modify or monitor various aspects of the PL/X personality.1) PASSIVE MOTOR SET contains all the windows used by the CHANGE PARAMETERS reduced menu in ascending PIN order to set the passive reduced values for motor 1 or 2.2) RECIPE PAGE is used to set the target page for a PARAMETER SAVE operation. There are 3 separate pages that each allow a total instrument to be stored. To re-call any page requires the appropriate power up reset choice.3) MAX CUR RESPONSE allows a super fast current response to be enabled.4) ID    ABCXRxxx    MON, is used by the unit suppliers to identify the power chassis and is not intended to be used for any other purpose. A binary code is displayed.5) Iarm BURDEN OHMS is used, along with the actual burden, to derate the model armature current.	37	type0F/FBS/monitors.dvg	type0F/FBE/monitors.dvg	0	0	200	45	110	0		0
81	factory	en	Reserved Parameters	These parameters are fixed at the factory and should not be altered without authorization.Please consult your supplier.	59	type0F/FBS/reserved.dvg	type0F/FBE/reserved.dvg	0	0	200	45	680	0		0
82	digitalPost1	en	Digital Post 1	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/digitalPost1.dvg	0	0	120	60	610	0		0
83	digitalPost2	en	Digital Post 2	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/digitalPost2.dvg	0	0	120	60	611	0		0
84	digitalPost3	en	Digital Post 3	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/digitalPost3.dvg	0	0	120	60	612	0		0
85	digitalPost4	en	Digital Post 4	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/digitalPost4.dvg	0	0	120	60	613	0		0
86	analogPost1	en	Analog Post 1	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/analogPost1.dvg	0	0	120	60	614	0		0
87	analogPost2	en	Analog Post 2	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/analogPost2.dvg	0	0	120	60	615	0		0
88	analogPost3	en	Analog Post 3	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/analogPost3.dvg	0	0	120	60	616	0		0
89	analogPost4	en	Analog Post 4	These staging posts are like virtual wire wrap posts.The digital and analogue posts are allocated PIN numbers and are used as virtual wiring nodes. They can contain a value or act as constants for setting a value.1) When receiving values via a serial link, the posts can store the data and are then connected by the user to the desired destinations.2) Application blocks are normally dormant. Connecting the GOTO output to a PIN other than 400 activates them. Using a software post is extremely useful during system commissioning if a block output needs to be examined prior to incorporation into a system. The block will be activated by connecting it to one of these posts. The analogue posts are used for linear values.The digital posts are used for logic values, a zero value is a logic low, a non zero +/- value is a logic high.Note. Staging posts may also be used for making connections between a GOTO and a GETFROM.Note. Any unused settable PIN may perform the function of a staging post. A convenient cluster of 8 PINs can be found in the PRESET SPEED application block for example.	1	type0F/FBS/post.dvg	type0F/FBE/analogPost4.dvg	0	0	120	60	617	0		0
